Modulation doped thyristor and complementary transistors combination for a monolithic optoelectronic integrated circuit

ABSTRACT

A thyristor and family of high speed transistors and optoelectronic devices are obtained on a monolithic substrate ( 149 ) with an epitaxial layer structure comprised of two modulation doped transistor structures inverted with respect to each other. The transistor structures are obtained by adding planar doping to the Pseudomorphic High Electron Mobility Transistor (PHEMT) structure. For one transistor, two sheets of planar doping of the same polarity separated by a lightly doped layer are added which are opposite to the modulation doping of the PHEMT. The combination is separated from the PHEMT modulation doping by undoped material. The charge sheets are thin and highly doped. The top charge sheet ( 168 ) achieves low gate contact resistance and the bottom charge sheet ( 153 ) defines the capacitance of the field-effect transistor (FET) with respect to the modulation doping layer of the PHEMT For the other transistor, only one additional sheet is added.

This is a continuation of application Ser. No. 09/798,316, filed, Mar.2, 2001, now U.S. Pat. No. 6,479,844.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to the field of semiconductor heterojunctiondevices and, in particular to a semiconductor structure which utilizesan inversion channel created by modulation doping to implementthyristors, transistors, optical emitters, optical detectors, opticalmodulators, optical amplifiers and other opto-electronic devices.

2. State of the Art

This invention builds upon the existing device structure known as thePseudomorphic Pulsed Doped High Electron Mobility Transistor (PulsedDoped PHEMT) and sometimes referred to as the Pulsed Doped ModulationDoped Field Effect Transistor (Pulsed Doped MODFET) or the Pulsed DopedTwo Dimensional Gas Field Effect Transistor(Pulsed Doped TEGFET).GaAs/InGaAs/Al_(x)Ga_(1-x)As has been the III–V material system ofchoice for these devices because of the ability to grow highoptical/electrical quality epitaxial layers by MBE (molecular beamepitaxy). However, relatively new wideband semiconductors such as GaNare also promising candidates since quantum wells are easily formed.PHEMTs are now in constant demand as the front end amplifier in wirelessand MMIC applications and they have become well recognized for theirsuperior low noise and high frequency performance.

The PHEMT has been very successful in producing microwave transistorsthat operate well into the multi-gigahertz regime, initially being usedextensively in military systems and now finding their way intocommercial products, particularly in the area of cellularcommunications. There are a multitude of advantages to be gained by theuse of optical signals in conjunction with electrical signals in thehigh frequency regime. Combining electronic with optoelectroniccomponents monolithically gives rise to the concept of theoptoelectronic integrated circuit (OEIC). In general, monolithicintegration has proven to be difficult because of the very dissimilarnature of the structures of electronic devices such as the FET on theone hand and the optoelectronic devices on the other hand such as thejunction diode laser and the MSM or PIN diode. To make matters even morecomplicated, the introduction of optoelectronic device combinations mustcompete with state-of-the-art electronic chip technology which iscurrently complementary MOS transistors in the form of Si CMOS circuits.The implication is that the introduction of optoelectronic devicecombinations must provide for complementary device combinations togetherwith optoelectronic functionality. In this way, an optoelectronictechnology base would provide both complementary functions andoptoelectronic functions which would provide it with a clear cutadvantage over conventional CMOS. The PHEMT may be modified foroptoelectronics by the use of an ohmic contact to replace the Schottkycontact (see U.S. Pat. No. 4,800,415 which is hereby incorporated byreference herein in its entirety). Such a device has been designated anHFET or more precisely an inversion channel HFET (ICHFET) to distinguishit from the broad range of III–V transistors which have been describedas HFETs. However, the detailed nature of how the p doping is added tothe PHEMT is a critical issue because the resulting structure mustperform multiple functions which are 1) it must provide a low resistanceohmic contact, 2) it must provide funneling of carriers into the activeregion of the optoelectronic device, and 3) it must minimize the effectsof free carrier absorption. In order to realize a complementarystructure with an ohmic contact modified PHEMT, it is necessary to growtwo different types of modulation doped quantum well interfaces, onewhich creates an inversion channel for electrons and one which createsan inversion channel for holes. The manner in which these two interfacesare combined structurally, affords some unique opportunities for thecreation of optical switches in the form of thyristors. These areroutinely formed in the implementation of CMOS technology as the seriescombination of p-n-p-n structures but are intentionally suppressed toeliminate parasitic latch-up. However in the design of the III-Vcomplementary technology layer structure, the thyristor may be optimizedto provide unique opportunities for switching lasers and detectors.

It is an object of this invention to devise a single epitaxial layerstructure which can simultaneously within a single integrated circuitchip be fabricated to operate as an electron majority carrier bipolartransistor, a hole majority carrier bipolar transistor, a field-effecttransistor with electrons as the channel majority carrier, afield-effect transistor with holes as the channel majority carrier, alaterally injected laser in which channel majority carriers are injectedfrom channel contacts and channel minority carriers are injected from anohmic gate contact, a thyristor switching laser, a thyristor switchingdetector which absorbs radiation across the bandgap of its quantumwell(s), a pin type bandgap detector in which majority photoelectronsare removed to the channel contacts and photoholes are removed to thegate or collector ohmic contact, an optical amplifier and a modulator.

Another object of the invention is to specify a fabrication technologyto produce a pair of complementary n-channel and p-channel field effecttransistors that function optimally as a complementary logic gate. Thisfabrication sequence should also produce complementary bipolarfield-effect transistors with n-channel and p-channel control elementsrespectively.

Another object of this invention is to show how the thyristor device maybe optimized from the same complementary technology sequence to performas a high efficiency laser when switched to its on state and as a highefficiency detector in its high impedance off state.

Another object of this invention is to produce an in-plane directionalcoupler using the complementary structure in which the propagationconstants in two parallel waveguides may be altered selectively by theinjection of charge into either or both of these guides fromself-aligned contacts which may inject charge into the core of theirrespective waveguides.

Another object of this invention is to show how the optoelectronicdevices can be fabricated as vertical cavity devices and yet alsoprovide sources, detectors, modulators, amplifiers and switches that areinterconnected by low loss passive waveguides in the plane of theintegrated circuit.

It is a further object of this invention to achieve these goals with aunique combination of planar sheet dopings which modify the genericPHEMT structure and provide it with optoelectronic capability.

A final object of this invention is to show how the complementarytransistor technology and the optoelectronic device technology areoptimized simultaneously for a manufacturable solution.

SUMMARY OF THE INVENTION

A semiconductor device structure and a fabrication technology have beeninvented to meet these objectives which achieves operation of verticalcavity devices as thyristor lasers and detectors together withcomplementary FET or bipolar operation using the same monolithicsemiconductor device structure. In accordance with one illustrativeembodiment of the invention, complementary ICHFET devices in whichsheets of planar doping positioned very close to the modulation dopedlayers are used to establish the gate capacitance of the field-effecttransistors (a p type sheet for the n channel transistor and an n typesheet for the p channel transistor) are combined epitaxially to realizeboth transistors in a single epitaxial growth. Each of these transistorsis the PHEMT device in which the gate contact is ohmic in nature asopposed to a Schottky diode. The ohmic contact is non-rectifying whereasthe Schottky diode contact is rectifying to applied signals.

The n type transistor is grown with the gate contact above the quantumwell (designated the normal configuration) and the p type transistor isgrown with the gate contact below the quantum well (designated theinverted configuration). For the n type transistor, there are two planarsheet doping layers, between the gate metal and the modulation dopedlayer of the PHEMT and both of these are opposite doping type (p type)to the modulation doped layer (n type). The surface sheet charge enablesa low resistance ohmic contact. The second sheet defines the inputcapacitance of the FET since it establishes the gate voltage at aprecise spacing above the modulation doped layer. The spacing betweenthese sheets of opposite doping types is undoped and formed in anintermediate band gap material relative to the quantum well.

The p type transistor is grown in the inverted configuration. Thelowermost layer is the n type sheet which is spaced by the criticalcapacitor thickness below the p type modulation doped layer. Below thisn type sheet is a layer of n+ type GaAs for the purpose of making anohmic contact to the gate of the p type transistor. The ohmic contact tothe bottom layer is made by conventional alloying techniques.

The collector contact of the n type transistor is formed by the channelregion of the p type transistor and the collector contact of the p typetransistor is formed by the channel region of the n type transistor.This is achieved by the combination of the normal and inverted deviceswithin the same set of epitaxial layers. The thyristor is created by thecomplete layer structure, so that it encompasses both n type and p typetransistors. The thyristor structure can make use of all of the terminalcontacts of the n type and p type transistors.

To create the n type inversion channel devices, source and drainelectrodes are formed on either side of a refractory metal gate/emitterusing ion implantation and standard self-alignment techniques. Thesource and drain electrodes are metalized after a high temperatureanneal which activates the implanted species. For the p type devices,the refractory metal defines the gate feature but actually performs asthe collector of the device. The gate layer is the bottom N+ layer andits electrical connection is provided by an ohmic contact placed to oneside of the source or drain regions to provide electrical access to thebottom epitaxial layer. For the field effect transistors, the gate orcollector contact metal forms a uniform metal feature across the length(short dimension) of the device. For the optoelectronic devices (whichincludes the thyristor laser, detector, optical amplifier and modulator)the gate metal is opened to allow the passage of light either into orout of the active region and the surface P++ planar sheet doping isrelied upon to produce a constant potential across the optical opening.Then the current flow from the gate metal contact into the active layeris two dimensional in nature with the contours of the carrier flowdetermined by the use of a Si implant to steer the carrier flow. Theoptoelectronic devices are resonant vertical cavity devices and thespacing between the modulation doped layers of the n and p typetransistors is adjusted to produce an integral number of halfwavelengths in the cavity.

The above embodiment produces optoelectronic devices that emit or detectnormal to the surface. In another embodiment, the DBR mirrors of thevertical cavity perform as the cladding layers for a dielectricwaveguide, and the light is entered into the edge of the device by meansof a passive waveguide fabricated monolithically with these devices. Bythe use of a grating etched into the waveguide, the light may becontinuously converted from vertical cavity to waveguide propagation.This operation is particularly significant for the laser, detector,modulator and amplifier devices.

Advantages gained by the construction of the semiconductor devicestructure are that: the FET capacitance and position of gate voltagecontrol are de-coupled from the doping used to achieve low gate contactresistance, the incidence of gate to source short circuits is greatlyreduced, the effective (electrical) thickness of the gate dielectric canbe made exceedingly thin, the sheets can be etched away to achieve lowcontact resistance, the threshold can be more easily adjusted by implantto obtain depletion devices, and manufacturability is much improved. Theadvantages obtained by the combination of the two transistors is that anew structure is formed which is the optoelectronic thyristor. Thethyristor has unique properties of sensitive detection in its highimpedance state and laser emission in its off state. The thyristorstructure may be used as a digital modulator, a transceiver, anamplifier and a directional coupler. These devices may be realized aseither waveguide or vertical cavity devices. The vertical cavityconstruction enables resonant cavity operation of all device modes. Inaddition to the multiple optoelectronic properties, the structure alsoproduces inversion channel bipolar devices termed BICFETs having eitherelectrons or holes as the majority carrier and heterostructure FETs withboth electron and hole channels. Therefore complementary operation ofFET or bipolar circuits is possible.

Further features and advantages of the invention will become morereadily apparent from the following detailed description when taken inconjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 a is a schematic view showing layers of the structure accordingto the principle embodiment of the invention and from which theelectronic and optoelectronic switching devices of the invention can bemade. FIG. 1 b shows the energy band diagram of the FIG. 1A structure.

FIG. 2 a shows the schematic cross-section of the n type transistor withsource, drain and gate contacts and in addition a back gate which islabeled as a collector. The drain is created as a low capacitance, highspeed node by the insertion of an oxygen implant to minimize the localcapacitance. This is also the cross-section of the p type bipolar device(n channel BICFET) in which the terminal designations are emitter,base/source, and collector which is shown optimized in FIG. 2 b.

FIG. 2 b shows the device contact geometry of the pδnp transistor. Inthis layout, the base/source terminal contacts the channel from bothsides and the collector contact is defined outside of the base contact.In this case, the base resistance is minimized at the expense ofcollector resistance which includes the unmodulated p channel below thebase contact regions.

FIG. 2 c shows the device contact geometry of the pδnp transistoroptimized for lower collector resistance. The base/source contact isself-aligned to one side of the channel and the collector contact isself-aligned to the other side. By comparison to FIG. 2 b thebase/source access resistance is higher but the collector accessresistance is lower.

FIGS. 2 d, 2 e, and 2 f show the construction of the PHFET which is alsothe construction of the nδpn transistor. The p+ layer for an ohmiccontact at the top of the structure and the p+ layer which defines theupper plate of the capacitor of the n channel. device are both etchedaway so the modulation doping is exposed prior to deposition of therefractory electrode. For the bipolar transistor, the emitter contactsare required on both sides of the mesa. For the FET, a gate contact onone side of the mesa will suffice.

FIG. 2 g shows the generalized construction of the optoelectronicthyristor structure configured as a vertically emitting or detectingdevice. Both n channel and p channel contacts are shown forcompleteness. The optical aperture is formed by N type implants whichare placed inside of the metal tungsten emitter contact. The currentflow into the active layer is guided by the implants as shown. Thebottom mirror is grown and converted to AlO/GaAs and the top mirror iscomprised of deposited layers.

FIG. 2 h shows the optoelectronic thyristor structure formed with onlythe electron channel contact as the third terminal input. This is themost practical thyristor structure as only a single high impedance inputnode is required to change state and the electron channel is preferabledue to its higher mobility.

FIG. 2 i shows the optoelectronic thyristor structure formed with theelectron third terminal input and adapted to the waveguide propagationof signals. The light is confined to an optical mode as shown by thecladding formed on the top by the deposited DBR mirror and by thecladding formed on the bottom by the grown DBR mirror. For the laserstructure, the light is converted from a vertically propagating mode toa waveguide propagating mode by the action of a second order diffractiongrating formed in the first mirror layer of the top deposited mirror.The waveguide device also performs as a thyristor digital receiver, as awaveguide amplifier and as a waveguide digital modulator.

FIG. 2 j shows the optoelectronic thyristor waveguide structure withelectron third terminal inputs and adapted to the formation of twoparallel waveguide channels. The light is coupled from one channel tothe other and vice versa by evanescent coupling. The coupling takesplace through a region of slightly larger bandgap and therefore slightlylower index created through techniques such as vacancy disordering. Theswitching in such a directional coupler device occurs by the injectionof charge into one of the two channels.

FIG. 3 is an optical receiver circuit.

FIG. 3 a shows the circuit configuration of the thyristor with a seriesload element which is a transistor integrated with the thyristor in theform of an HFET or a bipolar device. The third electrical terminalprovides a high impedance input to trigger the device. The IVcharacteristics of the device are also shown and switching occurs whenthe switching voltage has been reduced below the biasing voltage.

FIG. 3 b shows the top view of the in-plane configuration of the singlewaveguide device. The light propagates in the waveguide formed by thequantum wells as a core region and the dielectric mirrors as thewaveguide cladding regions. The light enters from a passive waveguideand exits to a passive waveguide. These passive waveguides have nearzero reflectivity at the transition to the active waveguide. The activedevice may have a grating defined in the first layer of the upperdielectric mirror to enable conversion from a laterally propagating to avertically propagating mode.

FIG. 3 c shows a top view of the directional coupler optical switch. Twoactive waveguide channels are separated by an electrically isolatingregion which evanescently couples waves between the two guides. Otheraspects of the guides are identical to FIG. 3 b.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1 a and FIG. 1 b show the layers of a structure in accordance withan embodiment of the invention and from which all the device structuresassociated with the optoelectronic technology can be made. The structureof FIG. 1A can be made, for example, using known molecular beam epitaxy(MBE) techniques. A first semiconductor layer 151 of AlAs and a secondsemiconductor layer 152 of GaAs are deposited in pairs upon asemiinsulating gallium arsenide substrate 149 in sequence to form adielectric distributed bragg reflector (DBR) mirror. The number of AlAslayers will preferably always be one greater than the number of GaAslayers so that the first and last layers of the mirror are shown aslayer 151. In the preferred embodiment the AlAs layers will besubsequently subjected to high temperature steam oxidation to producethe compound Al_(x)O_(y) so that a mirror will be formed at the designedcenter wavelength. Therefore the thicknesses of layers 151 and 152 inthe mirror are chosen so that the final optical thickness of GaAs andAl_(x)O_(y) are ¼ wavelength of the center wavelength λ_(D). Depositedupon the mirror is the active device structure which consists of twoHFET devices. The first of these is a p-channel HFET which has a pmodulation doped quantum well and is positioned with the gate terminalon the lower side (i.e. on the mirror as just described) and thecollector terminal on the upper side. The second of these is ann-channel HFET which has an n modulation doped quantum well and ispositioned with the gate terminal on the top side and the collectorterminal on the lower side which is the collector of the p-channeldevice. Therefore a non-inverted N-channel device is stacked upon aninverted p-channel device to form the active device structure.

The layer structure begins with layer 153 of heavily N+ doped GaAs ofabout 2000 Å thickness to enable the formation of ohmic contacts andthis is the gate electrode of the p channel device. Deposited on layer153 is layer 154 of N type Al_(x)1Ga_(1-x1)As with a typical thicknessof 500–3000 Å and a typical doping of 5×10¹⁷cm⁻³. This layer serves aspart of the PHFET gate and optically as the lower waveguide claddinglayers for all laser, amplifier and modulator structures. The next layerlayer 155 is Al_(x2)1Ga_(1-x2)As of thickness about 380–500 Å and wherex2 is about 15%. The first 60–80 Å (layer 155 a) is doped N+ type in theform of delta doping, the next 200–300 Å (layer 155 b) is undoped, thenext 80 Å (layer 155 c) is doped P+ type in the form of delta doping andthe last 20–30 Å (layer 155 d) is undoped to form a spacer layer. Thislayer forms the lower separate confinement heterostructure (SCH) layerfor the laser, amplifier and modulator devices The next layers definethe quantum well(s) of the PHFET. For a strained quantum well, thisconsists of a spacer layer 156 of about 10–25 Å of undoped GaAs and thencombinations of a well of 40–80 Å (labeled 157) and a barrier of undopedGaAs (labeled 158). The well may be comprised of a range ofcompositions. In the preferred embodiment, the quantum well is formedfrom a In_(0.2)Ga_(0.8)AsN composition with the nitrogen content varyingfrom 0% to 5% depending upon the desired natural emission frequency.Thus, for a natural emission frequency of 0.98 μm, the nitrogen contentwill be 0%; for a natural emission frequency of 1.3 μm, the nitrogencontent will be approximately 2%; and for a natural emission frequencyof 1.5 μm, the nitrogen content will be approximately 4–5%. The wellbarrier combination will typically be repeated three times. Unstrainedquantum wells are also possible. Following the last barrier of undopedGaAs is a layer 159 of undoped Al_(x2)1Ga_(1-x2) which forms thecollector of the PHFET device and is about 0.5 μm in thickness. All ofthe layers grown thus far form the PHFET device with the gate contact onthe bottom.

Layer 159 also forms the collector region of the NHFET device. Depositedon 159 is a layer 160 of undoped GaAs of about 200–250 Å which forms thebarrier of the first quantum well. This layer is wider than the normalbarrier layer of about 100 Å because it accommodates the growthinterruption to change the growth temperature from 610° C. (as requiredfor optical quality Al_(x2)1Ga_(1-x2)As layers) to about 530° C. for thegrowth of InGaAs. Therefore layer 160 is divided into a single layer 160a of about 150 Å and a repeating barrier layer of about 100 Å. The nextlayer 161 is the quantum well of In_(0.2)Ga_(0.8)As which is undoped andabout 40–80 Å in thickness. It is noted that the quantum well layer 161need not be of the same formulation as the quantum well layer 157. Thebarrier of 100 Å and quantum well of 40–80 Å may be repeated, e.g.,three times. Then there is a barrier layer 162 of about 10–30 Å ofundoped GaAs which accommodates a growth interruption and a change ofgrowth temperature. Next there is a layer 163 of about 300–500 Å ofAl_(x2)1Ga_(1-x2)As. Layer 163 is comprised from bottom to top of anundoped spacer layer 163 a of 20–30 Å of Al_(x2)1Ga_(1-x2)As, a layer163 b of N+ type doping of about 3–5×10¹⁸cm⁻³ which is a modulationdoped layer, a capacitor spacing layer 163 c of about 200–300 Å which isundoped and a P+ type delta doped layer 163 d of about 60–80 Å anddoping about 3–5×10¹⁸ cm⁻³ to form the top plate of the capacitor. Thedoping species for layer 163 d is preferably carbon (C) to ensurediffusive stability. In contrast to layer 163 b which is alwaysdepleted, layer 163 d should never be totally depleted in operation.Layers 163 d and 163 b form the two plates of a parallel plate capacitorwhich forms the field-effect input to all devices. For theoptoelectronic device operation, layer 163 is the upper SCH region.Layer 163 must be very thin to enable very high frequency operation. Inthe illustrated embodiment, for a transistor cutoff frequency of 40 GHz,a thickness of 300 Å would be used, and for 90 GHz a thickness of 200 Åwould be more appropriate. Layer 164 of Al_(x1)Ga_(1-x1)As is depositednext to form part of the upper waveguide cladding layer for the laser,amplifier and modulator devices. It has a typical thickness of 500–1500Å. Layer 164 may have a first thin sublayer 164 a of, e.g., 10–20 Åthickness and having a P+ typical doping of 10¹⁹ cm⁻³. A second sublayer164 b has a P doping of 1–5×10¹⁷ cm⁻³ and a typical thickness of 700 Å.Deposited next is layer 165 of GaAs or a combination of GaAs and InGaAswhich is about 50–100 Å thick and doped to a very high level of P+ typedoping (about 1×10²⁰cm⁻³) to enable the best possible ohmic contact.

As described hereinafter, to form resonant cavity devices, a dielectricmirror is deposited on this structure during the fabrication process.The distance between the mirrors is the thickness of all layers from 153to 165 inclusive. In designing this structure, this thickness mustrepresent an integral number of ¼ wavelengths at the designatedwavelength and the thickness of layers 164 and/or 159 is adjusted toenable this condition.

Using the structure as set forth, bipolar and field-effect transistorsand optoelectronic devices in the form of thyristors and transistors canbe made in accordance with a generalized set of fabrication steps. Thefirst structure shown in FIG. 2 a is the N channel HFET (NHFET). As thefigure shows it is formed with a refractory metal gate contact 168 (theelectrode is also labeled as an emitter because the same set of contactsmay be used to operate the structure as a bipolar device which is shownmore optimally in FIGS. 2 b and 2 c). Device fabrication begins with thedeposition of the refractory gate which is followed by an ion implant170 of N type ions to form self-aligned contacts to the channelconsisting of the layers 161 and 160. On the source side of the FET, thestructure is etched down to near (about 1000 Å above) the p type quantumwells 157 and an ion implant 173 of P type ions is performed to contactthe p type inversion channel. Also an insulating implant 171 such asoxygen is performed under the N type drain implant to reduce thecapacitance for high speed operation. Next the device is subjected to arapid thermal anneal (RTA) of the order of 900° C. or greater toactivate all implants. Then the device is isolated from other devices byan etch down to the semiinsulating substrate which includes an etchthrough the mirror pairs 151/152 of AlAs/GaAs. At this point, the deviceis oxidized in a steam ambient to create layers of AlO/GaAs to performas the final DBR mirror. During this oxidation step, the exposedsidewalls of the etched AlGaAs layers are passivated by the formation ofvery thin layers of oxide. The final step in the fabrication is thedeposition of Au metal contacts. These contacts come in three forms. Oneis the AuGe/Ni/Au contact 169 (169 a, 169 b) for the N+ type implants,one is the AuZn/Cr/Au contact 172 (172 a) for the P+ type implant andthe third is a final layer of pure Au (not shown) to form interconnectbetween device nodes.

A second structure is shown in FIG. 2 b in which the same fabricationsteps have been used, but the configuration has been more appropriatelyoptimized as a bipolar device. To achieve this, after the formation ofthe refractory contact 168 which is functioning as an emitter, both ofthe self-aligned implants 170 which contact the channel are connected asbase or control electrodes and have the function of controlling thelevel of charge in the inversion channel. The channel charge controlsthe thermionic current flow between the emitter and collector producinga thermionic bipolar device. The device is then etched to the collectormesa which is established about 1000 Å above the p type quantum wells157 and these wells are contacted by a P+ type ion implant, 173. Theremainder of the process is the same as in FIG. 2 a. It is noted thatthis bipolar is a pδnp device which would be grown with an inversionchannel which is normally on. In terms of bipolar devices, the p typebipolar is always inferior to the n type bipolar and therefore the mainapplication for this device is as the p type component in acomplementary bipolar technology.

It is noted in FIG. 2 b, that since both collectors 172 a, 172 b areoutside of the base or source contacts, the collector access resistanceis forfeited for the sake of channel or base access resistance. Thedevice can be constructed differently as shown in FIG. 2 c, by creatingthe source contact 169 a by self-alignment of implant 170 to one side ofthe emitter contact 168 and the collector contact 172 b byself-alignment of implant 173 to the other side of the emitter contact.The fabrication sequence therefore requires alignment of the mask withinthe emitter gate feature 168, which limits how small the feature can bemade. In the interests of higher speed, a tradeoff is therefore made.With this construction, the collector resistance has been optimized atthe expense of the overall source resistance.

In FIGS. 2 d–2 f, the cross-section is shown of the PHFET which isidentical in cross-section to the nδpn bipolar device. FIG. 2 d showsthat the top p+ layer 165 is etched away and a N+ implant 179 is usedbefore the refractory metal 168 is deposited in order to create a Ncontact to the collector region 159 of either the PHFET or the nδpn.bipolar device. Using the refractory contact 168 as a mask, thesemiconductor is etched to within 1000 Å of the p quantum wells and thenthe P+ type implant 173 is performed to create self-aligned contacts tothe p inversion channel 157/158. It is noted that the P+ type implantcan be made deep enough to penetrate through to the SI substrate belowwhich has the benefits of low capacitance for both bipolar and HFET highspeed circuit operation. Then a RTA step is performed to activate allimplants. Then a mesa is formed and the layers are etched down to the N+layer 153 that forms the underlying gate electrode. Next, a larger mesais etched down through the mirror layers to isolate all devices and theoxidation step is performed which creates mirrors under devices andpassivates all device sidewalls. The final step is the deposition of ptype Au alloy metals 172 to the P+ type implants and the deposition of ntype Au alloy metals 174 to the N+ gate layer.

In FIG. 2 e, the collector contact resistance is improved by making aself-aligned contact to the n type quantum well channel 161/160 byimplantation using the refractory metal as a mask but implanting only onone side of the feature. On the other side of the refractory contact,the semiconductor is etched down to 1000 Å from the p type quantum wells157/158 and a P+ type implant 173 is performed which creates the base orsource contact for the nδpn transistor by accessing the p type inversionchannel (as in FIG. 2 d this implant may penetrate through to the SIsubstrate). This type of construction requires a larger gate/emitterfeature 168 than the one in FIG. 2 d because an alignment is required inthe center of the feature. After the RTA step to activate the implants,a larger mesa is formed to create the emitter contacts 174 a, 174 b tothe N+ bottom layer 153, device isolation is formed as in FIG. 2 d andalso the Au contact metallurgy. With this type of construction, thecollector contact resistance is reduced at the expense of the base(source) access resistance. Therefore, in an attempt to achieve higherspeed, higher base access resistance is tolerated in order to achievelower collector access resistance.

In FIG. 2 f, the device cross-section of another approach to obtain lowcollector access resistance is shown which is potentially superior toFIGS. 2 e and 2 d. In this case, the material is initially etched toremove layers 165, 164 and 163 d. By doing this etch, all of the P+ typelayers are removed prior to the deposition of the refractory contact. Bydeposition of a W/In contact metallurgy and the use of the RTA step, asmall amount of alloying occurs which is sufficient to cause the W/In tointeract with the N+ charge sheet layer, 163 b. Using this approachrequires extremely tight control of the semiconductor etch to enableprecise etching and removal of the P+ charge layer. This approach isenabled by the novel epitaxial growth introduced here. The epitaxialgrowth has been designed to concentrate all of the p type barrier chargeinto a thin sheet spaced away from the n type modulation doping. Byseparating the two charge sheets in this fashion, it is possible to etchto the position between them and thus effectively remove all of the ptype doping layers from the top of the device. If this approach can beimplemented effectively, it is the optimum approach because it mayminimize the collector resistance and the base resistance together and,at the same time the collector capacitance. Once the refractory gate 168has been defined and etched, the fabrication follows that described forFIG. 2 d.

It should be noted that the various structures of FIGS. 2 a–2 f (as wellas the structures of FIGS. 2 g–2 j discussed hereinafter) can be formedadjacent each other (e.g., on separate mesas) and interconnected asdesired. Thus, for example, the NHFET structure of FIG. 2 a and PHFETstructure of FIG. 2 d can be interconnected to form complementary FETcircuits where the gate terminal 168 of FIG. 2 a is coupled to the gateterminal 174 a or 174 b of FIG. 2 d, the drain 169 b of FIG. 2 a iscoupled to the drain 172 b of FIG. 2 d, the NHFET source 169 a of FIG. 2a is coupled to ground, and the PHFET source 172 a of FIG. 2 d isconnected to a positive supply voltage. It should also be appreciatedthat mesas are formed by etching down to desired layers. Thus, dependingupon the electrical and thermal isolation characteristics desired, amesa can be formed, e.g., by etching down to the top mirror layer 152,or even deeper down to the substrate layer 149.

In FIGS. 2 g–2 j, the fabrication sequences previously described areadapted to the formation of optically emitting, detecting, modulatingand amplifying devices. FIG. 2 g shows the device cross-section of thethyristor device with N+ ion implants 170 used to form self-alignedchannel contacts to the n type inversion channel and P+ ion implants 173used to form self-aligned channel contacts to the p type inversionchannel. These channel injectors enable switching of the thyristor withn type and/or p type high impedance third terminal inputs. Theseimplants are formed using the identical fabrication steps as justdescribed in FIGS. 2 a–2 f. The subcollector or backgate connection isalso created by etching to the N+ bottom layer 153 and applying theAuGe/Ni/Au ohmic alloy contact 174 (174 a, 174 b) and the p type and ntype implants 173/170 are contacted by p type and n type Au alloy metals(172 and 169) respectively as described previously. The key differencefor the optical devices is in the formation of the emitter contact. Thedevice fabrication begins with the definition of alignment marks (notshown) by etching and then the deposition of a layer of Si₃N₄ (notshown) to act as protection for the surface layer and as a blockinglayer for subsequent ion implants. Then an ion implant 175 of N typeions is performed using a photomask that is aligned to the alignmentsmarks, and produces an optical aperture 176 defined by the separationbetween the implants. The implants create a p-n junction in the layersbetween the n type quantum wells and the surface and the space betweenthe implants defines the region in which the current may flow andtherefore the optically active region. The current cannot flow into then implanted regions 175 because of the barrier to current injection. Thecurrent flow trajectory is shown in the Figure. The laser thresholdcondition is reached before the voltage for turn-on of this barrier.Following the implant, the refractory gate 168 is deposited and definedas an annulus which is also aligned to the alignment marks and thereforeto the implant. The metal etching stops on the nitride inside theannulus and on the semiconductor outside the annulus. The rest of thefabrication follows the descriptions above until after all metalinterconnects have been defined. To form resonant cavity devices, adielectric mirror is deposited on this structure during the fabricationprocess. The distance between the mirrors is the thickness of all layersfrom 153 to 165 inclusive. In designing this structure, this thicknesspreferably represents an integral number of ¼ wavelengths at thedesignated wavelength and the thickness of layer 164 and/or 159 isadjusted to enable this condition. Then a dielectric mirror is createdon the top of the device by the deposition of dielectric layers 166 and167, typically layers of SiO₂ and a high refractive index material suchas GaAs or GaN. The dielectric mirror serves two purposes. It defines acavity for the vertical emission and absorption of light and it servesas the cladding layer for a waveguide so that light may propagate in theplane of the wafer. For most applications, only the electron thirdterminal 169 (169 a, 169 b) and not the hole third terminal 172 (172 a,172 b) will be used. A cross-section of a device without the holeterminals 172 is shown in FIG. 2 h with the device operating as avertical cavity emitter or detector.

Returning to FIG. 2 g, as an optoelectronic component, this device ismultifunctional. If the source 169 is biased positively or the collector172 is biased negatively, then the thyristor will switch to its on stateand if the biasing is above the threshold for lasing, then laseremission will be obtained through the optical aperture at the topsurface of the device. This is the operation of a vertical cavity laser.If the thyristor is in the off state and light is admitted through thetop optical aperture, then the device functions as a digital detector inthe sense that when sufficient electron-hole pairs have been generatedto achieve the critical switching condition, then switching to the onstate will occur. The configuration for an optical receiver is shown inFIG. 3. Suppose the device is biased to its supply voltage V_(DD)through a load resistor R_(L),180. Suppose also that the N+ electronsource terminal 169 (designated the injector) is biased to the mostpositive voltage V_(DD) through a current source, 181. When light isincident on the detector of sufficient intensity to produce photocurrentin excess of the current source drawing on the injector terminal, thethyristor will switch on. When the incident light is reduced, thethyristor will switch off because the current source on the injectordrains the channel of charge. Therefore this circuit functions as anoptical receiver.

The device shown in FIG. 2 _(h) may also function as an in-plane orwaveguide device if a grating is formed in the upper mirror layer 166,167 according to the techniques discussed in U.S. Pat. No. 6,031,243 toTaylor, which is hereby incorporated by reference herein in itsentirety. The grating performs the function of diffracting the lightproduced by the vertical cavity into light propagating in a waveguidewhich has the upper (166,167) and lower (151,152) mirror layers aswaveguide cladding layers and the implants 170 as lateral confinementregions. This kind of operation is shown in FIG. 2 i. A plan view ofthis device showing how the passive waveguides connect to the activewaveguides is shown in FIG. 3 b. This device has the modes of operationof a laser, a detector, a modulator and an amplifier. As a laser, alllight generated within the vertical cavity is directed laterally intothe waveguide formed by the mirrors and is then connected to a passivewaveguide at the edge of the device. As a waveguide detector, the lightis entered into the device from a passive waveguide, is diffracted intothe vertical cavity mode and is absorbed resonantly in the verticalcavity. In this manner of operation, the device would be biasedelectrically as shown in FIG. 3 and the function of the circuit would bethat of an optical receiver. However it also noted that if thesubcollector contact 174 in FIG. 2 h or 2 i is not connected (i.e. it isallowed to float) then the device may operate as a simple pin detectorwith connections to the gate 168 and to the source 169, since aphotocurrent would be produced in the gate/emitter to source circuit andswitching would be prohibited. As a waveguide absorption modulator, twoforms of operation are possible. First, the device may perform as adigital modulator if the device is biased as a thyristor and theelectrical data is entered via the injector. The injector injectscurrent into the device and it switches to the on state if the data is aone. In the switched on state there is no optical loss and an optical“1” is produced. On the other hand, if the data is a zero the injectorcontinuously removes charge (current flows out of the device) and forcesthe device to remain in the off state. In the off state, all of theoptical signal is absorbed and an optical “0” is produced. For thisoperation, the device may operate either with or without the grating.However, with the use of the grating a shorter length of device ispossible. Second, the device may perform as an analog modulator if thesubcollector of the device is not connected. As an analog modulator, anylevel of modulated intensity is obtainable by varying the injector inputvoltage up to the maximum absorption change of the modulator produced bythe maximum voltage for FET conduction without bipolar conduction, sinceswitching may not occur with the subcollector disconnected.

The final mode of operation of the device is as a waveguide amplifier.If the device in FIG. 2 i is operated in the switched on state but wellbelow the threshold for lasing, then optical signals input to the devicefrom a passive waveguide at one end may be amplified to a larger opticalsignal at the output of the device. For the amplifier also, the gratingmay or may not be used. However, the use of the grating will result in ashorter device. It will also result in the stabilization of thepolarization, since the grating supports the TE mode much more stronglythan the TM mode.

All of the modes of operation discussed thus far have involved only oneactive waveguide connected to one passive waveguide on the input to thedevice and another passive waveguide on the output of the device. Aparticularly significant innovation is obtained if two of the modulatorwaveguides are brought into close proximity in the lateral dimensionsuch that the guided light in one waveguide evanescently couples to theguided light in the second waveguide and vice versa. A cross-section ofthis device is shown in FIG. 2 j which shows the optical modes 177 and179 propagating in the two waveguides. The fabrication is identical tothat of the single modulator device except that prior to the rapidthermal anneal (RTA), the nitride layer that protects the opticalopening is patterned to create an opening 178 that evenly divides thetotal optically active area into two waveguide channels. The p+ layersare removed in this opening. Then SiO₂ is deposited and during the RTA,vacancy disordering occurs, so that a slightly larger energy gap iscreated in the region 178. This energy gap provides an ideal region forevanescent coupling to occur. The remainder of the processing followsthat of the waveguide devices discussed earlier. This device has twopassive waveguide channels as inputs and two passive waveguide channelsas output as indicated by the plan view of the device in FIG. 3 c. Sucha device is called a directional coupler and the switching of light frommode A to mode B in FIG. 2 j is induced by a differential change in thewaveguide propagation constant between guides A and B. This change isproduced by the injection of charge into the inversion channel from theself-aligned channel contact and can be produced by the injection ofcharge into one or the other of the two channels (but not both). It isnoted that the construction technique of the two channels must be suchthat the two waveguides are identical in all respects so that thecoupling length will be constant over a large area. There are differentmodes of operation which may be considered. In one, the subcollector isbiased to ground through a load resistor and the emitters are biasedpositively. Therefore both waveguide sections are potential switches.Then when current is injected into one side (one of the source regions169), that side will switch and will result in a filling of the electronchannel on that side only (it is noted that when one side switches theother side may not switch because the voltage across the device has beenreduced). This will produce a distinct difference in propagationconstant between the two waveguides which is ideal for the evanescentcoupling. It is noted that once switched to the on state, the gain ofthe waveguide as an amplifier may be adjusted to offset all otheroptical losses (such as insertion loss etc.). With the injection ofcharge, the absorption edge of the quantum wells in the waveguide willbe shifted and there will be a wavelength λ_(max) corresponding to themaximum change of absorption. According to the Kramers Kronig relations,there will be an increase in refractive index for λ>λ_(max) and adecrease for λ<λ_(max). For the through, or unswitched state, it isrequired for the light to evanescently couple from channel A to channelB and then back to A and vice versa for channel B. Therefore for thethrough state we require the largest index and would choose thewavelength λ>λ_(max). This means that in the through state, bothchannels should be full of charge which corresponds to the switched onstate. Hence when operating the directional coupler in the thyristormode, the on state corresponds to the through state. However, since weknow that the thyristor switching can only occur in one of thewaveguides, then the charge in the second waveguide is provided byinjection in an analog mode without switching. Therefore the desiredmode of switching is to switch on one side of the switch and then topresent the data for switching to the other side. The cross state(switched state) corresponds to the optical signal on channel A couplingto channel B only once and vice versa for the optical signal on channelB. Suppose the channel A thyristor is switched on. Then the transitionfrom the through state to the cross state occurs when the source inputto channel B is injected with charge. When channel B is emptied ofcharge, the absorption increase is removed in that channel and thereforealso the increase in index is removed. This results in the change inpropagation constant and therefore in the increase in the couplinglength which is associated with the cross state. It is noted that in thethrough state with charge in both channels, there is optical gainavailable in both channels. In the cross state, there is optical gainavailable in one channel. Such gain is useful to offset the insertionloss and losses incurred in traversing the directional coupler. It isnoted that in order to take advantage of this gain, the wavelength ofthe optical mode may need to be adjusted to coincide with the maximumchange in the refractive index. This may be accomplished by localizedheating of the switch using a dedicated HFET as a heating element.

The passive waveguides interconnecting all devices are also created bythe use of the vacancy disordering technique. In the passive waveguideregions, a ridge is etched and is coated with SiO₂ so that anon-absorbing (and therefore low loss) region is formed. The passivewaveguide is later coated with the upper dielectric mirror layers toprovide the upper cladding layers for waveguide propagation.

There has been described and illustrated herein a semiconductorstructure which utilizes an inversion channel created by modulationdoping to implement thyristors, transistors, optical emitters, opticaldetectors, optical modulators, optical amplifiers and otheropto-electronic devices. While particular embodiments of the inventionhave been described, it is not intended that the invention be limitedthereto, as it is intended that the invention be as broad in scope asthe art will allow and that the specification be read likewise. Thus,while particular layers have been described with particular thicknessesand with particular types and strengths of dopings, it will beappreciated that certain transition layers could be removed and/oradditional layers and/or sublayers could be utilized, and further thatthe layers could have different thicknesses and be differently doped.Also, while particular layers have been described with reference totheir percentage content of certain constituents, it will be appreciatedthat the layers could utilize the same constituents with differentpercentages, or other constituents. Additionally, while particularformation and metalization techniques have been described, it will beappreciated that the described structures can be formed in othermanners, and other metals used to form terminals. Further, whileparticular arrangements of bipolar and FET transistors, opticalemitters, detectors, modulators, amplifiers, etc. formed from thedescribed semiconductor structure, and circuits utilizing thosecomponents have been described, it will be appreciated that otherdevices and circuits can be made from the provided structure andcomponents. It will therefore be appreciated by those skilled in the artthat yet other modifications could be made to the provided inventionwithout deviating therefrom.

1. A semiconductor device, comprising: a series of epitaxial layersgrown on a substrate, said epitaxial layers including an N+ doped layer,a first plurality of layers forming a p-type modulation doped quantumwell spaced from said N+ doped layer by at least a first epitaxiallayer, a second plurality of layers forming an n-type modulation dopedquantum well, said first plurality of layers being separated from saidsecond plurality of layers by at least a second epitaxial layer, and aP+ doped layer spaced from said second plurality of layers by at least athird epitaxial layer.
 2. A semiconductor device according to claim 1,wherein: said p-type modulation doped quantum well comprises a P+ dopedlayer of AlGaAs, a quantum well layer of substantially undoped InGaAs,and a barrier layer of GaAs.
 3. A semiconductor device according toclaim 1, wherein: said n-type modulation doped quantum well comprises anN+ doped layer of AlGaAs, a quantum well layer of substantially undopedInGaAs, and a barrier layer of GaAs.
 4. A semiconductor device accordingto claim 1, wherein: at least one of said n-type modulation dopedquantum well and said p-type modulation doped quantum well includessubstantially undoped InGaAsN.
 5. A semiconductor device according toclaim 1, wherein: said series of epitaxial layers include a plurality ofdistributed bragg reflector (DBR) mirror layers of AlAs and GaAs.
 6. Asemiconductor device according to claim 1, wherein: said at least asecond epitaxial layer separating the p-type and n-type modulation dopedquantum wells is a relatively thick layer of AlGaAs.
 7. A semiconductordevice according to claim 6, wherein: said at least a second epitaxiallayer further includes a layer of GaAs.
 8. A semiconductor deviceaccording to claim 1, wherein: said series of epitaxial layers includesdistributed bragg reflector (DBR) mirror upon which is deposited (i) afirst sequence of layers to implement a modulation-doped bipolarfield-effect transistor with electrons (n type) as its majority carrier,its emitter deposited on said DBR mirror and its collector as a topsurface layer, said n type bipolar transistor having a p type inversionchannel at a modulation-doped interface performing as a field-effectcontrol element in the role of a conventional base region and saidbipolar transistor layer structure also implementing a p channelheterostructure field-effect transistor (PHFET) layer structure withsaid emitter layer performing in the role of a gate contact layer forsaid PHFET, and (ii) a second sequence of layers deposited on said firstsequence of layers, to implement a modulation-doped bipolar field-effecttransistor with holes (p type) as its majority carrier, its collectorlayer being common with said collector of said n type bipolar transistorand its emitter as a top surface layer, said p type bipolar transistorhaving an n type inversion channel at a modulation-doped interfaceperforming as a field-effect control element in the role of aconventional base region and said bipolar transistor layer structurealso implementing an n channel heterostructure field-effect transistor(NHFET) layer structure with said emitter surface layer performing inthe role of a gate contact layer for said NHFET.
 9. A semiconductordevice according to claim 8, wherein: said n type bipolar transistor iscomprised of a sequence of layers comprising a first bottom layer of N+GaAs, a layer of N type Al_(x)Ga_(1-x)As, said N+ doped layer ofAl_(y)Ga_(1-y)As, said at least a first epitaxial layer of undopedAl_(y)Ga_(1-y)As, and said p-type modulation doped quantum wellincluding a delta-doped layer of P+ type Al_(y)Ga_(1-y)As, a spacerlayer of undoped Al_(y)Ga_(1-y)As, a spacer layer of undoped GaAs, andat least one unstrained GaAs quantum well with an Al_(y)Ga_(1-y)Asbarrier or at least one undoped quantum well of InGaAsN with a GaAsbarrier, said at least one second epitaxial layer comprises undopedAl_(y)Ga_(1-y)As to function as a collector of said n type transistorand also wherein said p type transistor begins with said collector as acommon collector, and said p type bipolar transistor is comprised of asequence of layers deposited on said at least one second epitaxial layerincluding a spacer layer of undoped GaAs said n-type modulation dopedquantum well including at least one Al_(y)Ga_(1-y)As barrier andunstrained GaAs quantum well or at least one undoped quantum wells ofInGaAsN with a GaAs barrier, a spacer layer of undoped GaAs, a spacerlayer of undoped Al_(y)Ga_(1-y)As, a delta-doped layer of N+ typeAl_(y)Ga_(1-y)As, a layer of undoped Al_(y)Ga_(1-y)As, said layer of P+doped Al_(y)Ga_(1-y)As, a layer of P type Al_(x)Ga_(1-x)As, and a layerof P+ type GaAs or a GaAs and InGaAs combination to act as a metalliccontact layer for the emitter of said p type transistor.
 10. Asemiconductor device according to claim 9, wherein: x=0.7 and y=0.15.11. A semiconductor device according to claim 10, wherein: thepercentage of nitrogen in said InGaAsN is selected to be 0% for anatural emission frequency of 0.98 μm, approximately 4%–5% for a naturalemission frequency of 1.5 μm, and between 0% and 5% for natural emissionfrequencies between 0.98 μm and 1.5 μm.
 12. A semiconductor deviceaccording to claim 9, wherein: said at least one Al_(y)Ga_(1-y)Asbarrier and unstrained GaAs quantum well or at least one undoped quantumwell of InGaAsN with a GaAs barrier comprises a series ofAl_(y)Ga_(1-y)As barriers and unstrained GaAs quantum wells or a seriesof undoped quantum wells of InGaAsN with GaAs barriers.
 13. Asemiconductor device according to claim 9, wherein: said at least onesecond epitaxial layer of Al_(y)Ga_(1-y)As has a thickness between 4000Å and 10000 Å.
 14. A semiconductor device according to claim 9, wherein:said layer of N type Al_(x)Ga_(1-x)As of said n type bipolar transistorhas a doping of approximately 5×10¹⁷ cm⁻³ and a thickness of 500 Å–3000Å, said N+ doped layer of Al_(y)Ga_(1-y)As has a doping of approximately3×10¹⁸ cm⁻³ and a thickness of 60 Å–80 Å, said at least a firstepitaxial layer of undoped Al_(y)Ga_(1-y)As has a thickness of 200 Å–300Å, said delta-doped layer of P+ type Al_(y)Ga_(1-y)As has a doping ofapproximately 3–4×10¹⁸ cm⁻³ and a thickness of 60–80 Å, said spacerlayer of undoped Al_(y)Ga_(1-y)As has a thickness of 20–30 Å, saidspacer layer of undoped GaAs has a thickness of approximately 15 Å, saidp type bipolar transistor is comprised of a sequence of layers depositedon said at least one second epitaxial layer including said spacer layerof undoped GaAs of about 100 Å, said spacer layer of undoped GaAs ofsaid p type bipolar transistor has a thickness of about 15 Å, saidspacer layer of undoped Al_(y)Ga_(1-y)As of said p type bipolartransistor has a thickness of 60 Å–80 Å, said layer of undopedAl_(y)Ga_(1-y)As of said p type bipolar transistor has a thickness of200 Å–300 Å, said layer of P+ type Al_(y)Ga_(1-y)As of said p typebipolar transistor has a doping of approximately 3×10¹⁸ cm⁻³ and athickness of 60 Å–80 Å, said layer of P type Al_(x)Ga_(1-x)As has adoping of approximately 5×10¹⁷ cm⁻³ and a thickness of 1000 Å–3000 Åthickness, and said layer of P+ type GaAs or a GaAs and InGaAscombination has a doping of approximately 5×10¹⁹–10²⁰ cm⁻³.
 15. Asemiconductor device according to claim 1, by applying a fabricationsequence which uses a set of alignment marks being etched forregistration of patterns; N type ions being implanted to produce a pnjunction which forms a current steering path and two dimensionalconduction for positive carriers into an active area of the structureand also establishes a negative threshold to make depletion transistors;a refractory metal being defined to form gate electrodes for n channelfield-effect transistors or emitter electrodes for p type bipolartransistors and p type contacts for all lasers and detectors, saidrefractory metal forming a collector electrode for said p channelfield-effect transistors by the initial removal of said top P++ surfacelayer and P+ delta doped sheet, said refractory metal pattern formingoptical apertures to allow the flow of optical energy into and out ofsaid optoelectronic device; N type ions being implanted to form lowresistance contacts to said n channel field-effect transistor inversionchannel using the refractory metal and its photoresist as a mask tocreate self-alignment, said inversion channel being produced in saidquantum wells of GaAs, strained InGaAs or strained and unstrainedInGaAsN by the presence of said modulation doped layer of said p typebipolar transistor; P type ions being implanted to form low resistancecontacts to said p channel field-effect transistor inversion channelusing the refractory metal in the role of a collector as a mask tocreate self-alignment, said inversion channel being produced in thequantum wells of GaAs, strained InGaAs or strained and unstrainedInGaAsN by the presence of said modulation doped layer of said p typebipolar transistor; rapid thermal annealing of said implantations toactivate and to perform disordering of selected areas; formation ofactive device areas into mesas by the use of a deep etch to exposebottom mirror layers which is then followed by the steam oxidation ofAlAs layers completely under said active device; definition and etchingof contact areas to said P+ ion implanted regions, to said N+ ionimplanted regions and to said bottom N+ layer performing as said gatecontact of said p channel HFET or as said emitter of said n type bipolartransistor; definition of resist for lift-off procedure of p and n typegold alloys followed by metalization and lift-off of metals in n typeand p type regions; application of polyimide isolation, etching ofcontact windows and lift-off of interconnect gold metal patterns;application of distributed bragg reflector mirror layers for lasers anddetectors.
 16. A semiconductor device according to claim 14, adapted tothe operation of an optoelectronic thyristor in which said top P++emitter is said device anode, said N+ bottom emitter region is saiddevice cathode and said N+ ion implanted source regions which contactsaid n type inversion channel perform as a high impedance third terminalinput node, a device acting as a thyristor electrically with welldefined off and on states and a switching voltage which may be modulatedwith current input from said third terminal, from a maximum value atzero injection current to a minimum value with high injection, saidthyristor performing as a VCSEL in its switched on state when said onstate current flow exceeds said laser threshold with light emission fromsaid optical aperture and said thyristor performing as a resonant cavitydetector in the off state with light entering said optical aperture suchthat the photogenerated electron-hole pairs may switch said thyristorfrom said off state to said on state when sufficient charge has beenaccumulated in one or both of said inversion channels in said thyristor.17. A semiconductor device according to claim 14, adapted to theimplementation of complementary HFET functions in which an N channelHFET is formed on one mesa and a P channel HFET is formed on anothermesa, said device gate terminals having a common connection serving asan input node, said device drain terminals having a common connectionserving as an output node, said PHFET source node being connected to apositive supply voltage and said NHFET source node being grounded suchthat complementary operation is obtained.
 18. A semiconductor deviceaccording to claim 14, adapted to the implementation of complementarybipolar functions in which an n type bipolar (electron majority carrier)transistor is formed on one mesa and a p type bipolar (hole majoritycarrier) transistor is formed on another mesa, said device sourceterminals having a common connection serving as an input node, saiddevice collector terminals having a common connection serving as anoutput node, said p type emitter node being connected to a positivesupply voltage and said n type emitter node being grounded such thatcomplementary bipolar operation is obtained.
 19. A semiconductor deviceaccording to claim 14, adapted to the operation of an active waveguidedetector of optical power in which said DBR mirrors applied above andgrown below the active layers act as cladding layers for waveguidepropagation, said N+ ion implanted source regions removing electronphotocurrent from said electron inversion channel, said P++ top emitterand said P+ ion implanted source regions removing hole photocurrent fromsaid hole inversion channel, said bottom N+ gate region being biased toensure a fully populated p type inversion channel to form a high speedtransmission line for hole conduction, said optical input being admittedto said channel region via a passive waveguide which is self-aligned tosaid active waveguide defined by said refractory metal electrode andsaid N type waveguiding channel implants, said passive waveguideachieving low insertion loss into said active waveguide by virtue of aslightly larger energy gap in said passive region achieved by impurityfree vacancy disordering or similar technique to achieve a minimalchange in refractive index and hence near zero reflectivity at saidpassive/active waveguide interface.
 20. A semiconductor device accordingto claim 14, adapted to the operation of an active waveguide receiver ofoptical power in which said DBR mirrors applied above and grown belowthe active layers act as cladding layers for waveguide propagation, saidN+ ion implanted source regions being biased by an integrated currentsource to remove a constant flow of electron photocurrent from saidelectron inversion channel, said bottom N+ gate region or subcollectornode being biased with respect to said p+ emitter contact through aseries load element such that switching of said thyristor to its onstate occurs with a minimum optical input power when light is admittedto said waveguide and switching of said thyristor back to its off stateoccurs when said optical signal is terminated, said optical receiverproviding an electrical output at the connection node of said thyristorand said series load element, said optical input being admitted to saidchannel region via a passive waveguide which is self-aligned to saidactive waveguide defined by said refractory metal electrode and said Ntype waveguiding channel implants, said passive waveguide achieving lowinsertion loss into said active waveguide by virtue of a slightly largerenergy gap in said passive region achieved by impurity free vacancydisordering or similar technique to achieve a minimal change inrefractive index and hence near zero reflectivity at said passive/activewaveguide interface.
 21. A semiconductor device according to claim 14,adapted to the operation of an active waveguide amplifier of opticalpower in which said DBR mirrors applied above and grown below the activelayers act as cladding layers for waveguide propagation, said N+ ionimplanted source regions injecting electrons into said upper electroninversion channel, said top P++ emitter injecting holes from saidrefractory metal contact and said lower hole inversion channel supplyingholes to said upper quantum well in the role of a floating p electrodesupplied by holes from said top P++ emitter, said bottom N+ gate regionalso floating electrically, said optical input being admitted to saidactive waveguide via a passive waveguide which is self-aligned to theactive waveguide defined by said refractory metal electrode and said Ntype waveguiding channel implants, said passive waveguide achieving lowinsertion loss into said active waveguide by virtue of a slightly largerenergy gap in said passive region achieved by impurity free vacancydisordering or similar technique to achieve a minimal change inrefractive index and hence near zero reflectivity at said passive/activewaveguide interface, thereby resulting in effectively single pass gainoperation for said optical amplifier.
 22. A semiconductor deviceaccording to claim 14, configured and operated as an optoelectronicthyristor optical amplifier in which said top P++ emitter is said deviceanode, said N+ bottom emitter region is said device cathode and said N+ion implanted source regions contact said n type inversion channel as ahigh impedance third terminal input node, said DBR mirrors applied aboveand grown below the active layers to act as cladding layers forwaveguide propagation, said device being biased at a current level wellbelow the threshold current of said thyristor laser and thus performingas an optical amplifier, said optical input being admitted to saidactive waveguide of said thyristor optical amplifier via a passivewaveguide which is self-aligned to said active waveguide defined by saidrefractory metal electrode and said N type waveguiding channel implants,said passive waveguide achieving low insertion loss into said activewaveguide by virtue of a slightly larger energy gap in said passiveregion achieved by impurity free vacancy disordering or similartechnique to achieve a minimal change in refractive index and hence nearzero reflectivity at said passive/active waveguide interface, therebyresulting in effectively single pass gain operation for said opticalamplifier.
 23. A semiconductor device according to claim 14, adapted tothe operation of an active waveguide absorption modulator of opticalpower in which said DBR mirrors applied above and grown below saidactive layers act as cladding layers for waveguide propagation, said N+ion implanted source regions being biased negatively with respect tosaid P++ emitter contact in order to inject electrons into said upper ntype quantum well inversion channel resulting in a filling of saidquantum wells, said P+ ion implanted source regions and said N+ lowergate region being connected together and biased positively to act as asource of holes which fills said upper n type quantum well, saidinjected electrons and injected holes resulting in a shift of theabsorption edge in said upper quantum well(s) to higher energies(shorter wavelengths), said shift in absorption edge vastly reducing theabsorption of light such that said optical power is propagated throughsaid device with negligible absorption compared to the unshifted stateat zero bias in which essentially total absorption is achieved, saidoptical power being admitted to said active waveguide via a passivewaveguide which is self-aligned to the active waveguide defined by saidrefractory metal electrode and said N type waveguiding channel implants,said passive waveguide achieving low insertion loss into said activewaveguide by virtue of a slightly larger energy gap in said passiveregion achieved by impurity free vacancy disordering or similartechnique to achieve a minimal change in refractive index and hence nearzero reflectivity at said passive/active waveguide interface, therebyresulting in low insertion loss for said waveguide modulator.
 24. Asemiconductor device according to claim 14, configured and operated asan optoelectronic thyristor digital optical absorption modulator foroptical input signals with active layers sandwiched between DBR mirrorsapplied above and grown below said active layers to act as claddinglayers for waveguide propagation, in which said top P++ emitter is saiddevice anode, said N+ bottom emitter region is said device cathode andsaid N+ ion implanted source regions contact said n type inversionchannel as a high impedance third terminal input node, said modulatorhaving two states, one corresponding to the normally off condition whichis highly absorptive and the other corresponding to the normally onstate in which both upper and lower quantum well levels are filled withelectrons and holes such that the absorption edge in both sets ofquantum wells is shifted to higher energies allowing passage of theoptical signal through the waveguide with essentially no absorptiveloss, said third terminal being biased to a current source such thatafter passage of said optical input signal, said thyristor is switchedback to the off state in order to absorb a following optical signal,said optical input being admitted to said active waveguide of saidthyristor optical modulator via a passive waveguide which isself-aligned to said active waveguide defined by said refractory metalelectrode and said N type waveguiding channel implants, said passivewaveguide achieving low insertion loss into said active waveguide byvirtue of a slightly larger energy gap in said passive region achievedby impurity free vacancy disordering or similar technique to achieve aminimal change in refractive index and hence near zero reflectivity atsaid passive/active waveguide interface, thereby resulting ineffectively single pass gain operation for said optical modulator.
 25. Asemiconductor device according to claim 14, adapted to the operation ofa directional coupler optical switch, comprising two parallel activewaveguides separated by an electrically isolating optical couplingregion of narrow dimensions, said coupling region being produced by atechnique such as impurity disordering wherein the bandgap of saidregion is increased slightly by thermal processing in the presence of anSiO₂ overlayer, each waveguide being accessed electrically by one sourcenode and one P++ gate/emitter node, such that optical power entering afirst waveguide may be coupled evanescently to a second waveguide over aminimum distance with a negligible power component remaining in saidfirst waveguide(cross state) or said optical power may couple completelyback to said first waveguide (thru state) with negligible powerremaining in said second waveguide , said coupling being initiated bythe application of voltages between said gate/emitter and said sourcenodes of either waveguide, said voltages injecting electrons into saidinversion channels resulting in a change in propagation constant of saidfirst waveguide with respect to said second waveguide, said change inpropagation constant resulting from a shift in absorption edge of firstwaveguide with respect to second waveguide causing a significant changein the length to achieve complete coupling of optical power, saidwaveguides using said DBR mirrors applied above and grown below saidactive layers to act as cladding layers for waveguide propagation, saidoptical inputs to first and second waveguides being admitted to saidwaveguides via passive waveguides which are self-aligned to said activewaveguides defined by said refractory metal electrodes and said N typewaveguiding channel implants, said passive waveguides achieving lowinsertion loss into said active waveguides by virtue of a slightlylarger energy gap in said passive region achieved by impuritydisordering or similar technique to achieve a minimal change inrefractive index and hence near zero reflectivity at said passive/activewaveguide interface, thereby resulting in very low insertion loss.
 26. Asemiconductor device according to claim 1, adapted to the operation of athyristor in which an anode terminal is operably coupled to said P+doped layer, a cathode terminal is operably coupled to said N+ dopedlayer, and a third terminal input node is operably coupled to saidn-type modulation doped quantum well.
 27. A semiconductor deviceaccording to claim 26, wherein: said thyristor switches between off andon states in accordance with a signal supplied to said third terminalinput.
 28. A semiconductor device according to claim 27, wherein: saidthyristor performs as a VCSEL in its on state.
 29. A semiconductordevice according to claim 27, wherein: said thyristor performs as aresonant cavity detector in its off state.
 30. A semiconductor deviceaccording to claim 1, adapted to perform complementary HFET functions inwhich an N channel HFET is formed with a gate terminal operably coupledto said P+ doped layer and source and drain terminals operably coupledto said n modulation doped quantum well, and in which a P channel HFETis formed with a gate terminal operably coupled to said N+ doped layerand source and drain terminals operably coupled to said p-typemodulation doped quantum well.
 31. A semiconductor device according toclaim 1, adapted to perform complementary bipolar functions in which ann type bipolar transistor is formed with an emitter terminal operablycoupled to said N+ doped layer, a base terminal operably coupled to saidp-type modulation doped quantum well, and a collector terminal operablycoupled to an n-type region above said p-type modulation doped quantumwell, and in which a p type bipolar transistor is formed with an emitterterminal operably coupled to said P+ doped layer, a base terminaloperably coupled to said n-type modulation doped quantum well, and acollector terminal operably coupled to said p-type modulation dopedquantum well.
 32. A semiconductor device according to claim 1, adaptedto perform as an optoelectronic thyristor optical amplifier foramplifying the optical power of light guided into an active region ofthe semiconductor device.
 33. A semiconductor device according to claim1, adapted to perform as an optical modulator for modulating the opticalpower of light guided into an active region of the semiconductor device.34. A semiconductor device according to claim 1, adapted to perform as adirectional coupler optical switch comprising two parallel activewaveguides separated by an electrically isolating optical couplingregion of narrow dimensions.
 35. A semiconductor device according toclaim 34, wherein: said coupling region is produced by impurity vacancydisordering wherein the bandgap of said coupling region is increasedslightly by thermal processing in the presence of an SiO₂ overlayer. 36.A semiconductor device according to claim 34, wherein: each waveguideincludes a source node and a gate node, and voltage levels supplied tosaid source node and said gate node selectively control couplingoperation between the two waveguides.
 37. A semiconductor deviceaccording to claim 36, wherein: voltage levels supplied to said sourcenode and gate node of the two waveguides effectuate one of a crossoverstate and a thru state, wherein in said crossover state optical powerentering a first waveguide is coupled evanescently to a second waveguideover a minimum distance with a negligible power component remaining insaid first waveguide, and in said thru state optical power entering saidfirst waveguide is coupled completely back to said first waveguide withnegligible power remaining in said second waveguide.